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Question, i.MX6Q LDB pix clock setting

Question asked by Masamichi Miyamoto on Mar 13, 2017
Latest reply on Mar 15, 2017 by Joan Xie

Dear team,

 

I would like to ask about LDB pix clock setting

My customer needs to know how to set LDB(ldb_di0_ipu/ldb_di1_ipu) pix clock(LVDS_CLK) to 74.25MHz in the case of using 24MHz clock input into i.MX6Q.

In the customer’s understanding, LDB clock(LDB_DI0_SERIAL_CLK_ROOT / LDB_DI1_SERIAL_CLK_ROOT) should be 519.75MHz for making 74.25MHz of pix clock. (512.75MHz = 74.25MHz x 7)

So, they cannot get 74.25MHz of pix clock, accurately, with 24MHz clock.

Is it possible to get 74.25MHz of pix clock with 24MHz clock input?

If yes, please show me the way to configure.

 

Thanks,

Miyamoto

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