K64 KSDK2.1 watchdog fires when disabled

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K64 KSDK2.1 watchdog fires when disabled

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manfredschnell
Contributor IV

Hi,

we use K64 with KSDK2.1 and IAR Workbench.

I use KSDK2.1 lib funtions.

I use the K64 internal watchdog in my application. After using the watchdog in my application, I want to disable the watchdog again.

--> the disabled watchdog resets the system

I wrote a little demo:

- Setup GPIO A5 for debug purpose

- enable watchdog with 2 seconds + IRQ

- wait a short time

- disable watchdog

- wait forever

When waiting "forever" the disabled watchdog resets my system after 2 seconds. It looks, like the watchdog is still enabled!

Can anyone look at this, and tell me what goes wrong??

Best regards

Manfred

// GPIO
#define BOARD_TP37_GPIO                       GPIOA 
#define BOARD_TP37_PORT                       PORTA 
#define BOARD_TP37_PIN                        5 
#define BOARD_TP37_PIN_MASK                   (1L<<BOARD_TP37_PIN) 

#define BOARD_WDOG_IRQ_PRIO                   0
#define BOARD_WDOG_IRQ                        WDOG_EWM_IRQn


void Watchdog_IRQHandler(void)  {
  WDOG_ClearStatusFlags(WDOG, kWDOG_TimeoutFlag);
  // signal on A5 (TP37)
  GPIO_SetPinsOutput(GPIOA, BOARD_TP37_PIN_MASK); 
  GPIO_ClearPinsOutput(GPIOA, BOARD_TP37_PIN_MASK); 
  GPIO_SetPinsOutput(GPIOA, BOARD_TP37_PIN_MASK); 
return;
}

void main (void)  {
  uint32_t wait;
  wdog_config_t config;
  const port_pin_config_t pin_port_config = {
    .pullSelect = kPORT_PullDisable,
    .slewRate = kPORT_SlowSlewRate,
    .passiveFilterEnable = kPORT_PassiveFilterDisable,
    .openDrainEnable = kPORT_OpenDrainDisable,
    .driveStrength = kPORT_LowDriveStrength, 
    .mux = kPORT_MuxAsGpio,
    .lockRegister = kPORT_UnlockRegister 
  };    
  const gpio_pin_config_t pin_gpio_config = { kGPIO_DigitalOutput, 0 };
  
    // prepare GPIO A5 for signaling watchdog IRQ
    CLOCK_EnableClock(kCLOCK_PortA);
    PORT_SetPinConfig(BOARD_TP37_PORT, BOARD_TP37_PIN, &pin_port_config);
    GPIO_PinInit(BOARD_TP37_GPIO, BOARD_TP37_PIN, &pin_gpio_config);

    // reset GPIO A5
    GPIO_ClearPinsOutput(GPIOA, BOARD_TP37_PIN_MASK); 

    
    WDOG_GetDefaultConfig(&config);  
    
    // enable watchdog with ~2sec
    config.enableWdog = true;
    config.timeoutValue = 2000/8;
    config.enableInterrupt = true;
    config.prescaler = kWDOG_ClockPrescalerDivide8;
    config.clockSource = kWDOG_LpoClockSource;
    config.workMode.enableDebug = false;
    WDOG_Init(WDOG, &config);
    WDOG_Refresh(WDOG);
    
    
    // set priority and enable Watchdog IRQ
    NVIC_SetPriority(BOARD_WDOG_IRQ, BOARD_WDOG_IRQ_PRIO);
    EnableIRQ(BOARD_WDOG_IRQ);
    
    // global interupts enable
    __enable_interrupt();

    // wait a short time
    wait = 0x10000;
    while(--wait);
    
    // disable the watchdog again.
    WDOG_GetDefaultConfig(&config);  
    config.enableWdog = false;
    WDOG_Init(WDOG, &config);

    // wait, for nothing to happen, because the watchdog is disabled!!!
    for(;;);
}
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7 Replies

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Manfred,

As you know that watchdog can reset the K64, in the loop code:



not opportunity 

 while(--wait);Hope it can help you
BR
Xiangjun Rong
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manfredschnell
Contributor IV

Hi Xiangjun Rong,

thank you for your answer.

I removed  the line "while(--wait);" and get the same result. --> The K64 resets every 2 seconds (I see Impulse on GPIO A5).

Can you remove the line, too? --> so, I think, the watchdog should sure be disabled. And you should never see any impulse on GPIO A5.

I'm going to write a demo, to proof, that the K64 is reset by the disabled watchdog.

Best regards

Manfred

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Manfred,

There is dedicated api function to disable watchdog in SDK2.0 package instead of calling the the following function:

config.enableWdog = false;
    WDOG_Init(WDOG, &config);

Pls try to use the function to disable watchdog:
static inline void WDOG_Disable(WDOG_Type *base)
{
    base->STCTRLH &= ~WDOG_STCTRLH_WDOGEN_MASK;
}


There is an exampl for watchdog in SDK2.0, pls refer to it:

C:\Freescale\SDK2.0_FRDM_K64F\boards\frdmk64f\driver_examples\wdog

Hope it can help you
BR
Xiangjun Rong
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manfredschnell
Contributor IV

Hi Xiangjun Rong,

I replaced the lib-call WDOG_Init() with WDOG_Disable(), as you suggested.

The WDOG_Disable() only writes to watchdog registers.  To be sure, that I'm allowed to write to this registers I used the following sequence:

    // disable the watchdog again.
    WDOG_Unlock(WDOG);
    WDOG_Disable(WDOG);

But after that change, the watchdog isn't disabled and resets my system every 2 seconds.  --> no change.

Did you check this behavior with Hardware? 

Best regards

Manfred

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manfredschnell
Contributor IV

Hi Xiangjun,

for your hardware test, I wrote an other IRQ-Handler.

It toggles the GPIO A5 as often as the system has been reset by watchdog.

Please replace the IRQ-Handler in my example with this one.

void Watchdog_IRQHandler(void)  {
uint32_t watchdogCount;
  WDOG_ClearStatusFlags(WDOG, kWDOG_TimeoutFlag);

  watchdogCount = WDOG_GetResetCount(WDOG);
  // signal on A5 (TP37)
  while(watchdogCount--)  {
    // Toggle Pins as often as Watchdog happend
    GPIO_SetPinsOutput(GPIOA, BOARD_TP37_PIN_MASK); 
    GPIO_ClearPinsOutput(GPIOA, BOARD_TP37_PIN_MASK); 
  }
return;
}‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

After 10 seconds I got this output:

watchdog_reset_impulses.PNG

The System has been reset 5 times. --> every second one more impulse can be see on GPIO A5. --> the system is reset by watchdog!

The maximum of impulses is 10. After that time, the runtime for watchdog IRQ is over and the watchdog resets the system.

Please test this and confirm!

Best regards

Manfred

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Manfred,

Regarding the 5 GPIO pulse, do you mean that the 5 GPIO pulses are caused by the GPIO  toggleing code in

Watchdog_IRQHandler()? which means that the watchdogCount variable is 10, right?
If it is the case, it means that there is a delay between watchdog interrupt and the later Reset event.
BR
Xiangjun rong
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manfredschnell
Contributor IV

Hi Xiangjun,

in Watchdog_IRQHandler() I show  the value of the Register "WDOG.RSTCNT". The number of impulses represents the register-value. The watchdogCount variable in the picture is 5.

Yes, the number of 10 impulses is determined by the function "interrupt-then-reset" described in "24.6 Generated resets and Interrupts".

After the watchdog IRQ, the system runs for a short time, then the watchdog resets the system.

In my source code, the watchdog is disabled and should never reset the system.

Did you test my example with real hardware??

Best regards

Manfred

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