Comment Bug LPCopen LPC5410x

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Comment Bug LPCopen LPC5410x

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robertalkire
Contributor II

In the release lpc5410x_xpresso54102_lpcxpresso_v3.03.000_16, in file lpc_chip_5410x\inc\spi_common_5410x.h

starting at line 64, the comments are off by a line or incorrect:

Was 

#define SPI_CFG_BITMASK (0xFBD) /** SPI register bit mask */ 
#define SPI_CFG_SPI_EN (1 << 0) /** SPI Slave Mode Select */ <- Incorrect is SPI Enable
#define SPI_CFG_SLAVE_EN (0 << 0) /** SPI Master Mode Select */ <- Incorrect is Slave Enable
#define SPI_CFG_MASTER_EN (1 << 2) /** SPI MSB First mode enable */ <- Incorrect is Master Enable
#define SPI_CFG_MSB_FIRST_EN (0 << 3) /** SPI LSB First mode enable */ <- Incorrect is MSB First
#define SPI_CFG_LSB_FIRST_EN (1 << 3) /** SPI Clock Phase Select */ <- Incorrect is LSB first
#define SPI_CFG_CPHA_FIRST (0 << 4) /** Capture data on the first edge, Change data on the following edge */ <- Incorrect
#define SPI_CFG_CPHA_SECOND (1 << 4) /** SPI Clock Polarity Select */ <- Incorrect

should be

#define SPI_CFG_BITMASK (0xFBD) /** SPI register bit mask */
#define SPI_CFG_SPI_EN (1 << 0) /** Enable SPI */
#define SPI_CFG_SLAVE_EN (0 << 0) /** SPI Slave Mode Select */
#define SPI_CFG_MASTER_EN (1 << 2) /** SPI Master Mode Select */
#define SPI_CFG_MSB_FIRST_EN (0 << 3) /** SPI MSB First mode enable */
#define SPI_CFG_LSB_FIRST_EN (1 << 3) /** SPI LSB First mode enable */
#define SPI_CFG_CPHA_FIRST (0 << 4) /** Capture data on the first edge, Change data on the following edge */
#define SPI_CFG_CPHA_SECOND (1 << 4) /** Change data on the first edge, Capture data on the following edge */

Doesn't affect code, just confusing to read. 

Bob Alkire

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soledad
NXP Employee
NXP Employee

Hello Bob,

We will check this internally. Thank you for your feedback.

Have a great day,
Sol

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