Let me ask about the PCIe clock connection.
My customer want to debug with there custom board and MCIMX6Q-SDB.
So they need to make cable for connecting each other.
There custom board is as root complex and SDB is as end point.
I understand that it will transmit and receive data in a pair of TX and RX because the clock is encoded with 8b / 10b and the clock information is incorporated in the data.
So I think it's not required to connect CLKx_P/N which like a SDB.
Why does the CLK1_P/N connect to mini-PCIe connector in MCIMX6Q-SDB ? (Please see the SDB's schematic.)
Clock pins of mPCIe are connected to CLK1_N (C7 pin) and CLK_P (D7 pin) of i.MX.
As a board I think that I am going to be RC, so this is an output pin. Am I correct ?
Is it correct with understanding that there is no need to input a reference clock from i.MX externally when it becomes EP?
On each board, each SoC has Refclock.
Is it correct in understanding that PCS TX / RX should be linked even if connected?
I have already checked the following thread but I can't get the answer from it.