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How to set up gpio pins on iMX6SX (udoo neo) using FreeRTOS_BSP_iMX6SX?

Question asked by Ales Prchal on Mar 6, 2017
Latest reply on Mar 12, 2017 by Ales Prchal

Hello NXP community,

 

I keep struggling how to properly configure gpio_config_t structures for the udoo neo board. My goal is to set up "Arduino" pins 13 (embedded LED) and 8 for gpio. According to the schematics (www.udoo.org/download/files/schematics/UDOO_NEO_schematics.pdf) these pins are connected to the NANDF_D2 and NANDF_D5 pins on the iMX6SX side. Using FreeRTOS_BSP_1.0.0_iMX6SX/examples/imx6sx_sdb_m4/demo_apps/blinking_imx_demo as a starting point I have therefore prepared the following structures:


gpio_config_t gpio13 = {
    "GPIO13", /* name */
    &IOMUXC_SW_MUX_CTL_PAD_NAND_DATA02, /* muxReg */
    5, /* muxConfig */
    &IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02, /* padReg */
    0,
    GPIO4, /* base */
    6 /* pin */
};


gpio_config_t gpio8 = {
    "GPIO8", /* name */
    &IOMUXC_SW_MUX_CTL_PAD_NAND_DATA05, /* muxReg */
    5, /* muxConfig */
    &IOMUXC_SW_PAD_CTL_PAD_NAND_DATA05, /* padReg */
    0,
    GPIO4, /* base */
    9 /* pin */
};

 

Unfortunately, I cannot see any desired gpio activity (blinking LED). However, during one of my tests I have mistakenly used wrong pin config:

 

gpio_config_t gpio13 = {
    "GPIO13. Note that SD1_CLK pin is wrong", /* name */
    &IOMUXC_SW_MUX_CTL_PAD_SD1_CLK, /* muxReg */
    5, /* muxConfig */
    &IOMUXC_SW_PAD_CTL_PAD_SD1_CLK, /* padReg */
    0,
    GPIO4, /* base */
    6
};

 

And to my surprise this config somehow works, even though the mux and pad registers are wrong. So can anybody point out what is wrong with my gpio_config_t structures?

 

AP

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