How I enable core clock (78MHz in my case) to CAN engine clock source?
CAN0->CTRL1 = (CAN0->CTRL1 & ~CAN_CTRL1_CLKSRC_MASK) | CAN_CTRL1_CLKSRC(FLEXCAN_CLK_SOURCE_SYS);
But, in this case, I get bus clock...
Sorry for the late reply.
I have compared reference manuals. Peripheral Clock Summary is different for each mask set:
That’s probably the reason you cannot select SYS_CLK.
Retrieving data ...