K60 Without Clock connects through JTAG, with clock does not

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K60 Without Clock connects through JTAG, with clock does not

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charlieheard
Contributor I

Hi,

We're working on an implementation using the K60 which has now prototyped and is going through testing. There's a slight oddity in getting it to run however.

The PCB as manufactured, (erroneously) misses the 0V connection of the 50MHz oscillator used to clock the MCU. This just ties the clock line to 3v3 and as such, the code falls over when it gets to the point that it's initialising the external clock.

When the clock is properly fed its 0V, it produces a nice clean sin wave which makes it to the pin on the MCU. However, with the clock enabled properly, the connection to the PC (through a JTAG adapter), fails to establish altogether.

We therefore end up in a strange situation whereby the JTAG interface only works when there is no extrenal clock... Adding the clock while already connected also kills an existing connection.

Has anyone encountered similar/do they have any ideas as to what might cause such behaviour?

Many thanks

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charlieheard
Contributor I

Hi,

The clock source is an oscillator chip (http://uk.rs-online.com/web/p/crystal-oscillators/4719461/ ) and is connected directly to pin  72 (EXTAL).

- The reset pin has a 10k pullup and 0.1uF capacitor.

- The NMI pin was floating (as it has previously in successful designs) but is now tied to 3v3 with a 4k7 resistor as suggested. 

- Pins 50-53 all have 10k pullups (we're using JTCK, JTDI, JTDO and JTMS for JTAG, not SWD).

Still, with the oscillator enabled we are unable to connect with the debugger...

The board is currently running f/w that was successfully flashed with no external clock (running off internal clock), but now the oscillator has been reconnected, we cannot connect again.

Not quite sure what you mean about disturbing of the SWD pins? It's worth noting the f/w thats running at the moment pulls pin 54 (NMI) low, so even with the 4k7 resistor it's at 0V not 3v3.

Many thanks for your help so far

Charlie 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Charlie Heard,

  No, JTAG_TCLK can't pull up, you need to pull down if you add the external component:

pastedImage_1.png

     If you are convenient , can you share your schematic which just contains the JTAG interface and the MCU minimum system? I would like to help you to check it.


Have a great day,
Kerry

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Charlie Heard,

    This problem, you need to check your hardware.

   Please check the these simple points:

1. Reset pin, external  4.7K to 10K pull up resisor, and 0.1uf to ground.

2. NMI pin,  external 4.7K to 10K pull up resistor

3. SWD_DIO, external 10K pull up resistor

4, SWD_CLK, don't need to add external component.

After the above points, then connect your 50Mhz to the EXTAL0 pin, and try again.

Please note, your should use the 50Mhz as the external reference clock, not the crystal. The OSC just can support up to 32Mhz.

pastedImage_1.png

You can refer to the Tower board design:

http://www.nxp.com/assets/downloads/data/en/schematics/TWR-K60D100M_SCH.pdf 

If you still can't debug after connect the 50Mhz external reference clock, please check the SWD_DIO and SWD_CLK pin, NMI pin, did these pin have be disturbed?


Wish it helps you!

If you still have question, please let me know!

Have a great day,
Kerry

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