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IRQ counter compared to level change counter

Question asked by Dirk Schäfer on Feb 28, 2017
Latest reply on Feb 28, 2017 by igorpadykov

Dear all,


I use a IMX6 quad. With one outport I generate a square signal, 30ms low, 30ms high, 60ms, 15Hz. This pin is connected to an inport pin. Both pins are configured as GPIO, inport PIN with Schmitt-trigger, 22kHz, slow.

The inport counts the level changes. It counts exactly the same amount of level changes as the outport routine sets.

As expected.

Now I configure the GPIO irq registers, without using an interrupt routine. The irg status register is polled.

The irq config registers are set to 'rising edge', then the irg edge select register is used to get both edges

(manual chapter 28, PAGE 1434).


If irq status bit is set, inport shows 0 or 1 and hence a falling or rising edge.

The counter for this are higher as the counters for level changes.

For 8802 generated rising edges, the counter by polling level shifts is 8802. The counter by polling IRQs because of a rising edge is 8816.

For falling edges the difference is only 1 after 8802 generated falling edges.


I use WEC2013, the registers map to user space. Polling the levels is correct, polling the irq status register not.

Oscilloscope shows a beautiful square signal, so no problem here.


Does anyone has an idea about that?

Many thanks for your help.