Can we swap the DDR3 DQ pins on the processor (P1015) side with in the byte lane, in any random fashion.
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Before After (Swapping) DDR3 Memeory - ICSide
DQ0 --> DQ6 --> DDR3 D0
DQ1 --> DQ4 --> DDR3 D1
DQ2 --> DQ7 --> DDR3 D2
DQ3 --> DQ1 --> DDR3 D3
DQ4 --> DQ5 --> DDR3 D4
DQ5 --> DQ0 --> DDR3 D5
DQ6 --> DQ2 --> DDR3 D6
DQ7 --> DQ3 --> DDR3 D7
The DQS and DM lines remains same.
Regards,
Arun P
Have a great day,
Yes you can swap the DDR3 DQ pins on the processor (P1015) side within the byte lane. NXP application note “Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces” recommends ” Pin-swap within a given byte lane to optimize the data bus routes”.
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