XGATE-HC12X shared data handling

[lak]

Hi all,
Recently I moved few critical tasks to be handled by the XGATE on my MC9S12XEP100.
Basically, the XGATE thread collects the data in a shared buffer periodically.
Another periodic task on HC12X core, reads this buffer for further processing.
My question is, which is the best way to handle this data coherency, if the Hc12X thread reads the buffer while it might get updated by the periodic XGATE thread.
Semaphore is what I understand for locking shared peripherals but does it apply to shared data, I am unaware.

Please advise me any better methods for handling this.

Also is there a way to globally disable all the interrupts routed to Xgate, similar to the I bit mask on Hc12X core?


with regards,
Lak

[Steve]

Lak,

There are various techniques that you can use to share resources like this; depending on how your buffer is structured you may or may not have to worry about the coherency problem that can occur when both cores can write or read "in the same cycle". For example if you have a circular buffer then you may be able to design it such that the CPU can never access a record that XGATE is working on and vice versa.

If there is a possibility of a conflict then the on-chip semaphores are provided for this type of access management. They are not dedicated to any particular purpose as they are simply flags that are set and cleared as required by the two cores - it is the software designer's responsibility to determine how the CPU and XGATE behave when they successfully assert the semaphore and of course what they should do if the semaphore is already taken. The reference manual has a block diagram of the flow to use and semaphores are used in the AN2726 app note in a way similar to your approach.

Since the XGATE is basically an interrupt processing engine the only way to globally stop all interrupts that I can think of is by disabling XGATE completely (XGE bit).