Add a delay between A/D sample and conversion

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Add a delay between A/D sample and conversion

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brianzenowich
Contributor I

Kinetis K64: I have a short window of opportunity (like 300 ns) to sample a signal before process noise corrupts it. Unfortunately, the process noise also corrupts the conversion process, so I need to sample & hold the signal at one moment, then convert it during the next quiet moment. The reference manual says the conversion always immediately follows the sample, but I need to put a delay between these two actions. I don't think I can turn off the A/D peripheral after the sample while still preserving the sample, can I? How about reducing the A/D clock to zero Hertz right after the sample but before the conversion? If I then wait for a quiet moment to re-enable the A/D clock, would it still perform the conversion correctly? Are there any other techniques I could use to delay the conversion process after taking a sample? Or is there an app note which can help the conversion process become more immune to noise spikes on 3.3V/GND? I'm not using the 1.2V external voltage reference, would that help? Thanks!

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi

K64 ADC module conversion clock frequency in range of 1MHz to 18MHz, there could not be halted during ADC sample and conversion.

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Customer could consider to replace K64 product with LPC546xx product, which provides up to 5Msamples/s 12-bit ADC module.

More detailed info, please check here.


Wish it helps.

Have a great day,
Ma Hui
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