We need to use UART1 at 3.6864Mbps with the FIFO and although it works there is a hardware failure. At random times the RDRF flag in S1 is set but when you read the RCFIFO it is zero causing an endless interrupt loop.
From the interrupt handler:
void UART_TransferHandleIRQ(UART_Type *base, uart_handle_t *handle)
{
...
/* Receive data register full */
if ((UART_S1_RDRF_MASK & base->S1) && (UART_C2_RIE_MASK & base->C2))
{
/* Get the size that can be stored into buffer for this interrupt. */
#if defined(FSL_FEATURE_UART_HAS_FIFO) && FSL_FEATURE_UART_HAS_FIFO
count = base->RCFIFO;
#else
count = 1;
#endif
if (count == 0) {
__ASM("NOP"); // Breakpoint
}
/* If handle->rxDataSize is not 0, first save data to handle->rxData. */
while ((count) && (handle->rxDataSize))
{
...
The data register is not read as the count is zero. If I try to resolve the issue by reading the data register the RXUF flag in the SFIFO register gets set indicating that there was no data in the FIFO.
The problem is more pronounced if the baud rate division is below 3, 180MHZ / 16 / 3801600 = 2.959, as then it fails within a few bytes. If using a lower baud rate of say 921600 then there is no problem.
The FIFO water mark is set to 2 and I'm using 8,n,1.
Can anyone shed some light on the problem please?
Regards,
Charles
