I want to clarify DDR initialization for i.MX7D so I'm checking the following file.
uboot-imx.git - Freescale i.MX u-boot Tree
There are two registers which is not described in reference manual as below.
/* Clear then set bit30 to ensure exit from DDR retention */
DATA 4 0x30360388 0x40000000
DATA 4 0x30360384 0x40000000
What function of those registers ?
According to the section 2.1.5 AIPS Memory Map, it supposed to be CCM Analog register.
However, there are no description in RM so please tell me the function of the register.
Why do you set 0x40000000 to 0x30360388 and 0x30360384 ?
I also checked following thread.
Do I need to post this question to SR ?