Adam Jackson

MC9S08QE128 - Fast Startup, Low Power 4MHz Clock Source

Discussion created by Adam Jackson on Jul 21, 2008
Latest reply on Jul 25, 2008 by Jim Donelson

A brief description of my application, the device communicates solely on the SPI bus (it is slave), wakes when slave selected (SS) via IRQ, process the SPI task given, then sleeps.  The SPI command comes within 100uS of slave select, the SPI SCK clock from the master is 1MHz.  The main issue I have is that I need to sleep in the lowest possible power mode while still being able to wake and have the bus clock running at, at least 4MHz (4 x 1MHz_SPI_SCK).  I need to wake and have the bus clock running at 4MHz within at least 120us.  The wakeup time is what I am most concerned with.

I need to wake up fairly frequently, the IRQ interrupt comes fairly frequently, about once a second.  I believe that I need to keep the oscillator (or xtal) running because the startup time of a 4MHz external crystal is ~5ms (datasheet pg. 21).  If I used the ICS clock source, its startup is 100us max (datasheet pg. 22), this may be fast enough.  The internal reference is ~31-39kHz, so I assume that I will have to step up the clock to at least 4MHz with the FLL.  The FLL acquisition time is 1ms (datasheet pg. 23), so this means that if I use the ICS, the max startup time from power up to 4Mhz would be 100us+1ms = 1100us, is this correct?

Any ideas on what the lowest power way to do this is?  So far, the only option that I can think of is to either use the FLL and leave the output enabled at 4MHz while I am in STOP2 or use an external 4Mhz crystal.

Any ideas?