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timer with two interrupt flags

Question asked by Jim Deas on Feb 16, 2017
Latest reply on Mar 3, 2017 by Jim Deas

On the LPC24xx, how can I manage high rate interrupts for both MR0 and CR1? (Same VIC_TIMER1 address)

I have an application using CR0 as a clock source MR0 to reset that counter and CR1 to detect an async signal. As long as CR1 never fires the primary counter is flawless. Once I add CR1 and change the interrupt to steer the interrupt based on T1IR_bit(CR1INT or MR0int) I appear to lose some of the interrupts.

I am checking both bits in a attempt to service interrupts that happen while I am already in the interrupt routine but that does not seem to keep me from losing interrupts. I.E.



while( CR1INT | MR0INT){

   if CR1INT (do work, CR1INT=1)

   if MR0INT (do work, MR0INT =1)