MPC5604 DSPI TX/RX FIFO queue bytes size?
Which device did you mean?
There is 4-deep TX/RX FIFO on the MPC5604B and 5-deep TX/RX FIFO on the MPC5604P, MPC5604E.
can read PC14 input level when config this pin as SPI1 MISO (my target iic is MPC5604B)?
the PC14 cannot be set as SPI1 MISO, did you mean PC4?
For the PC4 if SIU.PCR. IBE bit is set you can read the input level from SIU.GPDI register too.
Retrieving data ...