VCCA_UV error on 33907

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

VCCA_UV error on 33907

923 Views
liujinhang
Contributor III

the VCCA_UV error on 33907 was triggered when we are doing test about ESD. details see below:

when we put -6000v voltage ESD on the CAN_H, we found the VCCA_UV error on 33907 was triggered. but when we put -4000v or -8000v voltage ESD on the CAN_H, the VCCA_UV error on 33907 can not be triggered.

and because the VCCA_UV error can not be cleared by READ, we worried that if the VCCA_UV error be triggered on car, we can only cut the power line of our ECU to clear this serious error. 

 

so we want:

1. we want to know the reason why VCCA_UV can be triggered by ESD test, and why only -6000v can trigger the error but -4000v or -8000v can not ?

2. we want to know if the VCCA_UV was triggered , how can we clear it but not need to cut the power line of our ECU.

PS: the 33907 is alway supplied by 12v voltage battery of our ECU on the car.

Labels (1)
0 Kudos
6 Replies

580 Views
TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Liu,

Looks strange to see a VCCA_UV at only -6KV while it passes at -8KV and only on VCCA and not the other regulators…
Anyway, VCCA_UV flag can be cleared on read, like any other flag. There is a typo in the datasheet saying only cleared by POR. So, not a blocking issue.
And in any case, the device would go in Deep Fail-safe with the possibility to restart with a Key OFF / Key ON cycle (IO_0=0 f and IO_0=1). You will never have to unplug the battery connection.
Best regards,
Tomas
0 Kudos

580 Views
liujinhang
Contributor III

As your saying about that there is a typo in the datasheet saying only cleared by POR, we do not need to unplug the battery connection to clear the VCCA_UV error in our test. 

but we still want to know why the  VCCA_UV can be triggered by -6000v ESD test?

the newest message is that we can resolve this problem by adding an Common Mode Chip Inductor  between CANH and CANL.

We want to know if the UM of 33907 recommend this point ? 

PS:   The Common Mode Chip Inductor will increase a lot of our bom cost. 

0 Kudos

580 Views
TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Liu,

Could you please share your schematic? This is the minimum before talking about details. In AN4766, we recommend to place an external ESD protection at CANH/L pins. Do you have them? And yes, we recommend to also use the common mode choke for the CAN.

Best regards,

Tomas

0 Kudos

580 Views
liujinhang
Contributor III

hi Tomas,

thanks for your response.

we do not add the common mode choke for the CAN in now our schematic, but we do have the external ESD protection at CANH/L pins. see below:

TT截图未命名.bmp

because we did not found any point at the UM specified the common mode choke need using here , so we did not add the common mode choke in PCB.   

  

so can you help us found the point at the UM specified the common mode choke need to be added?

PS: if we can not found the point at the UM specified the common mode choke need to be added, we think the UM saying that below words is not very accuracy.

TT截图未命名2.bmp

because when we do the -6kv ESD test , the VCCA_UV error will make 33907 reset MCU.

0 Kudos

580 Views
TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Liu,

First, the ESD GUN thresholds in the datasheet are verified against specific standards mentioned which request a CLASS D verification, not CLASS A.

- CLASS D means we check after the ESD GUN test we did not degrade the device performance (what is in the datasheet)

- CLASS A means we check during the ESD GUN test the device functionality (what you do)

Second, CAN physical layer requires by default a common mode choke. We would have clearly say in the documentation if this choke would be removed to be choke-less (what is not the case), and not the opposite.

Third, if further discussion is necessary, give us more details like:

- What is your ESD Gun set up (R, C values)?

- What standard do you follow?

- Where do you inject ESD pulse? Connector pin, after cable, air or contact discharge, …

Best regards,

Tomas

0 Kudos

580 Views
liujinhang
Contributor III

hi Tomas,

thank you very much.

the last question is that what is your gist for the words "CAN physical layer requires by default a common mode choke".

after i getting the gist, i think this problem can be closed. 

thank you very much again.     :smileyhappy:

0 Kudos