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LS1021A schematic review

Question asked by on Feb 14, 2017
Latest reply on Feb 14, 2017 by andrei.skok

Just finished my first LS1021A design, modified from the tower board (TWR-LS1021A-PB). I'd really appreciate it if someone can give me the contact at NXP who can do a quick review to catch any obvious errors. Main difference is the PCIe x4 bus added to communicate with Arria V.


Thank you!