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MX6 Solo Baremetal CSI Parallel Capture and Preview

Question asked by Arunachalam Ramaswamy on Feb 11, 2017
Latest reply on Feb 12, 2017 by Wigros Sun



I am trying to capture / preview CSI Parallel input coming from ADV7180 connected to CSI1_DAT pins 12 to 19 of i.MX6 Solo.


ADV7180 get CVBS input at AIN1. ADV7180 is configured for 8 bit Interlaced YUV422 output.

The output is fairly OK when checked on Oscilloscope.


I am trying to get "camera preview" data flow through IPU as described in Table 9-4. Time-Shared Data Flows Through The IPU (continued) of i.MX 6Solo/6DualLite Applications Processor Reference Manual Document Number: IMX6SDLRM Rev. 2, 04/2015 (given below).


Camera Preview - VF2 - Sensor -> Fmem -> VDIC -> IC -> Bmem -> IRT -> Fmem + DSx - two inputs and/or interlaced input - When the VDIC is used for de-interlacing, one of the three input fields can go directly from the sensor to the VDIC


Display is Tianma TM040YDHG32 MIPI LCD. Capturing frame in RGB 888 format is also OK. I am using i.mx6 Platfrom SDK.


Is there any bare metal example code to configure IPU for VF2?