I have been checked about FIFO overrun/underrun of i.MX53 FEC.
I tried to compare the occurrence then change the priority field of FEC bus master(FBPM_M4_RD/FBPM_M4_WR) in the M4IF_F_BPR1 register as following command.
$ /unit_tests/memtool -32 63fd8044=00000044
$ /unit_tests/memtool -32 63fd8040 2
But it seems nothing changed. (Rate of FIFO overrun/underrun looks the same.)
What's wrong with my commands? Why this register update affect nothing?
BTW Is there any tools to monitor bus status like "/unit_tests/mmdc2" for the i.MX6?
Can anybody help me?