Dear NXP i.MX Community,
in order pass the PCIe Gen2 compliance test for i.MX6, NXP recommends an external clock.
What about the i.MX7? Does it share the same PCIe IP? Will the internal be sufficient and what is NXP recommending?
„PCIe reference clock solution which provided by CLKx_N/P of i.MX6 chip can't pass PCIe Gen2 compliance test. Recommend using external PCIe 2.0/3.0 clock generator with 2 HCSL outputs solution. One clock channel connect to i.MX6 as a reference input, please click Ref14 for reference circuit. Another clock channel should connect to PCIe connector, please contact generator vendor for detailed design guide.“