We are using a Boundary Devices Nit6D_SOM in our current project running the QNX IPL. The i.MX6 on this SOM has an internal register called uSDHCx_SYS_CTRL used to control its internal SDMMC peripheral. Very early on in the IPL, the SW attempts to reset the SDMMC controller by setting the RSTA bit in the uSDHCx_SYS_CTRL register. The SW then waits for the RSTA bit to clear before proceeding. On different SOMs, we see the RSTA bit never resetting back to 0 about 5-20% of the time, causing the IPL to hang. There is a related errata associated with the i.MX51 (ENGcm10407) which suggests disabling the SD Card Clock before attempting to reset the SDMMC, but this has not resolved our problem. Has anyone else seen this behavior on the i.MX6?