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Question, i.MX6SL Errata ERR005778

Question asked by AVNET JAPAN FAE (team share account) on Feb 6, 2017
Latest reply on Feb 9, 2017 by igorpadykov

Dear team,

 

I would like to ask about Errata ERR005778 of i.MX6SoloLite.

My customer is trying to implement the workaround into their software(they use RTOS for their system). And in advance of that, they have following questions about the workaround. Please give your answers to the following questions.

As for workaround-1;

The errata document says that “Prior to reducing the DDR frequency (400 MHz), read the measure unit count bits (MU_UNIT_DEL_NUM).”

(1)

Can I understand that “Prior to reducing” means ANYTIME before reducing the DDR frequency?

(2)

Should the program which read out the MU_UNIT_DEL_NUM run on OCRAM?

Is it possible to run it on DDR?

 

As for workaround-2;

(“Bypass the automatic measure unit when below 100 MHz, by setting the measure unit bypass enable bit (MU_BYP_EN).”)

(3)

Could you show me when to execute this procedure?

ANYTIME after reducing clock?

(4)

Should this procedure run on OCRAM? Is it possible to run it on DDR?

(5)

Can I understand that one should not execute SDRAM code during MU_BYP_EN=1.

(6)

Is it needed to set MU_BYP_EN into 1 before setting MU_BYP_VAL, and to clear MU_BYP_EN after setting MU_BYP_VAL?

The customer thinks the above is needed.

 

As for workaround-3;

Double the measure unit count value read in step 1 and program it in the measure unit bypass bit (MU_BYP_VAL) of the MMDC PHY Measure Unit Register, for the reduced frequency operation below 100 MHz.

 (7)

Could you show me the reason why the measure unit bypass bit(MU_BYP_VAL) must be the double of the measure unit count value?

(8)

Should this procedure run on OCRAM? Is it possible to run it on DDR?

(9)

After those procedure is completed, is any wait time required?

Is it possible to go to next other operations with no wait?

 

As for the below statement;

Software should re-enable the measure unit when operating at the higher frequencies, by clearing the measure unit bypass enable bit (MU_BYP_EN).”

(10)             

Can I understand that one should clear MU_BYP_EN bit(MU_BYP_EN=0) before returning the clock frequency?

 

As for the below statement;

This code should be executed out of Internal RAM or a non-DDR based external memory.

(11)

Can I understand that the code for all of the workaround procedures(1,2 and 3) should be executed on internal RAM or non-DDR based memory?

 

Sorry for a lot of questions, but those are needed to write actual code for them.

 

Thanks,

Miyamoto

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