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MPC5748 CAN FD

Question asked by Shijia Guo on Jan 31, 2017
Latest reply on Feb 1, 2017 by Petr Stancik

Hello all!

 

I'm running into a timing issue while configuring the CAN FD on MPC5748G micro.

 

I’m using 40MHz F40 clock as CAN oscillator clock (fCANCLK). And my arbitration bit rate is set at 500K, and the data bit rate is set to be twice as that =1000K. The PSEG and DIV settings for arbitration and data are as follows:

 

 Register settings for CAN arbitration phase

Register settings for CAN data phase

 

The arbitration phase turns out to be ok. However, the data rate in the data phase is slightly imperfect. The data is supposed to be 1000ns/bit, however, on my scope it’s showing ~960ns/bit. Here’s the screenshot (yellow and blue are CAN high and low, red is CANH – CANL, I’m sending data 0b1010101….). This is causing the Canalyzer not being able to receive data correctly. Does anyone have any idea what’s happening and how to make the timing more accurate?

 Scope image of CAN FD data phase

 

 

 

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