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How to add intel i210 to imx6?

Question asked by Damien Huang on Jan 30, 2017
Latest reply on Feb 2, 2017 by Damien Huang

Hi,

I need helps in adding i210 to imx6 sabrelite with boundary android l5 kernel (3.10.53).

I added the the I210 chip to the board, and it can be seen with 'lspci' as below

 

root@nitrogen6x:/ # busybox lspci -mk                                          
00:00.0 "Class 0604" "16c3" "abcd" "0000" "0000" "pcieport"
01:00.0 "Class 0200" "8086" "1531" "8086" "0000"

 

or from yocto chroot (I added a yocto chroot into the android l5 release) as

root@10.211.190.154 ~# lspci -m
00:00.0 "PCI bridge" "Synopsys, Inc." "Device abcd" -r01 "" ""
01:00.0 "Ethernet controller" "Intel Corporation" "Device 1531" -r03 "Intel Corporation" "Device 0000"

 

I can also see it with 'cat /proc/bus/pci/devices'

root@10.211.190.154 ~# cat /proc/bus/pci/devices
0000    16c3abcd    180             1c00000                   0                   0                   0                   0                   0             1d00000              100000                   0                   0                   0                   0                   0               10000    pcieport
0100    80861531    9b             1000000                   0                1001             1800000                   0                   0                   0              800000                   0                  20                4000                   0                   0                   0    

 

dmesg also shows below:

imx6q-pcie 1ffc000.pcie: Link up, Gen=1
imx6q-pcie 1ffc000.pcie: PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [io  0x1000-0x10000]
pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff]
pci_bus 0000:00: root bus resource [bus 00-ff]
pci 0000:00:00.0: [16c3:abcd] type 01 class 0x060400
pci 0000:00:00.0: reg 10: [mem 0x00000000-0x000fffff]
pci 0000:00:00.0: reg 38: [mem 0x00000000-0x0000ffff pref]
pci 0000:00:00.0: supports D1
pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold
PCI: bus0: Fast back to back transfers disabled
pci 0000:01:00.0: [8086:1531] type 00 class 0x020000
pci 0000:01:00.0: reg 10: [mem 0x00000000-0x007fffff]
pci 0000:01:00.0: reg 18: [io  0x0000-0x001f]
pci 0000:01:00.0: reg 1c: [mem 0x00000000-0x00003fff]
pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
PCI: bus1: Fast back to back transfers disabled
pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
pci 0000:00:00.0: BAR 8: assigned [mem 0x01000000-0x01bfffff]
pci 0000:00:00.0: BAR 0: assigned [mem 0x01c00000-0x01cfffff]
pci 0000:00:00.0: BAR 6: assigned [mem 0x01d00000-0x01d0ffff pref]
pci 0000:00:00.0: BAR 7: assigned [io  0x1000-0x1fff]
pci 0000:01:00.0: BAR 0: assigned [mem 0x01000000-0x017fffff]
pci 0000:01:00.0: BAR 3: assigned [mem 0x01800000-0x01803fff]
pci 0000:01:00.0: BAR 2: assigned [io  0x1000-0x101f]
pci 0000:00:00.0: PCI bridge to [bus 01]
pci 0000:00:00.0:   bridge window [io  0x1000-0x1fff]
pci 0000:00:00.0:   bridge window [mem 0x01000000-0x01bfffff]

 

 

These information seems to me, the chip is detected and should be working, so I went on to download the mac address into the chip with the intel eepromARMtool. But the tools crashed with "Bus error" as below

root@10.211.190.154 ~/eepromARMTool# ./eepromARMtool
Intel(R) Eeprom ARM Tool ARM OTP Programming Tool
Provided under the terms of a CNDA.  Do Not Distribute.
Copyright(C) 2013 by Intel(R) Corporation
NIC    BUS    DEV    FUN    Silicon    Memory Type Present
===    ===    ===    ===    =====    ======================
Bus error

 

I looked thought information at I210 detection issues under embedded linux  -- ... |Embedded Community 

someone was saying, "We had to do modification on the Linux kernel driver to get ... to work", while the other was saying this is due to endian issue. I am wondering

   1) anyone knows which Linux kernel driver they were talking about to modify? - since the lspci command above did not show any kernel driver loaded with the device.

   2) how can endian cause this?

 

Thanks

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