ADV7611 to IMX6 CSI Interface (8-bit BT656)

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ADV7611 to IMX6 CSI Interface (8-bit BT656)

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tengri
Contributor IV

Hi All,

I am trying to interface ADV7611 hdmi chip with IMX6 processor. This is the driver I am using, although it's for 7610, I guess the register map look same, hence it should work !

linux-fslc/adv7610.c at 3.14-1.0.x-mx6-tinyrex · voipac/linux-fslc · GitHub 

Here I commented 'USE_16BIT' as we intend to use 8-bit mode with the imx6 development board we have. 

 

When the interface is made through 8-bit BT656 mode, I am receiving following error from the kernel ->

- mxc_v4l_open: Mxc Camera no sensor ipu0/csi1
- mxc_v4l_open: Mxc Camera no sensor ipu0/csi0
- mxc_v4l_open: Mxc Camera no sensor ipu1/csi1
- ipu_csi_window_size_crop: Error left=0 top=59565955
- imx-ipuv3 2400000.ipu: Unsupported CCIR656 interlaced video mode

 

When I try to run gstreamer on video0, it returns the same error in terminal while displaying a green (or purple color windows). 

I suspect this must be caused by the driver data pattern ! the platform I'm using is Nitrogen6x_max and running kernel version 4.1.15, with Ubuntu Xenial. Here is my dts arrangement :

--------------------------------------------------------------------------------------------------------------------------------------------------------------------------

&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";

adv7610: adv7610@4C {
compatible = "adv,adv7610";
reg = <0x4C>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_csi0>;
csi_id = <0>;
ipu_id = <0>;
reset-gpio = GP_OV5642_RESET;  //same reset pin used for ipu1 csi0 interface
};

// defined for 12-bit although 8-bit being used !!
pinctrl_ipu1_csi0: ipu1csi0grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x1b0b0
MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x1b0b0
MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x1b0b0
MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x1b0b0
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0
#define GP_OV5642_POWER_DOWN <&gpio3 29 GPIO_ACTIVE_HIGH>
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0b0b0
#define GP_OV5642_RESET <&gpio1 4 GPIO_ACTIVE_LOW>
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x030b0
>;
};

// P8 to P15 pins of ADV7611 connected to CSI0_DATA12 - DATA19 !!


v4l2_cap_0 {
compatible = "fsl,imx6q-v4l2-capture";
ipu_id = <0>;
csi_id = <0>;
mclk_source = <0>;
status = "okay";
};

v4l2_cap_1: v4l2_cap_1 {
compatible = "fsl,imx6q-v4l2-capture";
ipu_id = <0>;
csi_id = <1>;
mipi_camera = <1>;
mclk_source = <0>;
status = "okay";
};

v4l2_cap_2: v4l2_cap_2 {
compatible = "fsl,imx6q-v4l2-capture";
ipu_id = <0>;
csi_id = <1>;
mclk_source = <0>;
status = "okay";
};

v4l2_cap_3: v4l2_cap_3 {
compatible = "fsl,imx6q-v4l2-capture";
ipu_id = <0>;
csi_id = <0>;
mipi_camera = <1>;
mclk_source = <0>;
status = "okay";
};

--------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Driver was loaded successfully and :

lsmod | grep adv7610
adv7610_video 16384 0
v4l2_int_device 16384 4 ov5640_camera_mipi_int,tc358743_h2c_bridge,adv7610 _video,mxc_v4l2_capture

The driver seems to be enumerating the video0 device, and it only accepts YV12 format (configured with v4l2-ctl) ! What's causing this issue ?? 

Thanks in Advance

 Anuradha

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igorpadykov
NXP Employee
NXP Employee

Hi  Anuradha

please check

https://community.freescale.com/thread/329485

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
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igorpadykov
NXP Employee
NXP Employee

Hi  Anuradha

please check

https://community.freescale.com/thread/329485

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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tengri
Contributor IV

Thanks for your reply igor, I am sure the hardware interface between adv7611 and nitrogen6_max board is fine, but in this case I am using 8-bit bus of csi0 interface (the one being used for csi camera interfacing). So in this mode I am trying to get the free run mode activated, I have no way to test the chip for 16 bit mode because of the unavailability of the rest of the 16-bit bus pins. 

But one thing to note, if the chip runs in 8-bit mode, do we need to pull down other csi0 pins ? I didn't run into this error when ovp camera was tested !

Thanks

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igorpadykov
NXP Employee
NXP Employee

Hi  Anuradha

on that link 8-bit mode also described, in in 8-bit mode

no need to pull down other csi0 pins.

Best regards
igor

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sadatanvashisth
Contributor II

what will be the connection diagram to connect ADV7611 to IMX6UL evaluation board 

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tengri
Contributor IV

Assuming you use IPU1_CSI0 interface, your interface should be something like :

CSI0_DAT12 - DAT19 -> P8 - P15 (8_BIT_MAP)

and for 16 Bit interface :

CSI0_DAT2 - DAT9 -> P0-P7 + 8_BIT_MAP

 

CSI0 pins are configurable, I've seen DAT0-7 being used for P0-P7 as well. But make sure you pull down other pins (DAT0,1,10 and 11 in above case) as mentioned in igor's link ! Also note default kernel 3.0.35 does not support 16 bit mode !

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sadatanvashisth
Contributor II

As read some where in the discussion forum about putting pull down on unused data lines of CSI interface of iMX6UL , is it necessary.If yes what should be the value of pull down resistors?

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tengri
Contributor IV

Since it's weak pull down, a 10k should do !

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sadatanvashisth
Contributor II

Can some one let me know where to connect  HSYNC, VSYNC, and DE of ADV7611 in iMX6UL

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tengri
Contributor IV

Check the parallel camera connector, it should have syncs and DE !

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sadatanvashisth
Contributor II

Thanks for the reply Anuradha.

But in the camera connector of iMX6UL evaluation board , there are only data lines, HSYN, VSYNC and no DE. Please see if it is OK to do the connections as given below:

pastedImage_2.png

Do we need to use DE of ADV7611 or just connecting data line , LLC , HSYNC and VSYNC as per the diagram is fine.

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tengri
Contributor IV

DE is to notify that pixel data is ready ! So you want it. I haven't used UL board so I cannot help you specifically to UL, but I guess one of the available GPIOs from your board can be configured for DE pin through imx6 pad mux (this change is needed in dts file). Please refer page 2101 of reference manual. 

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sadatanvashisth
Contributor II

Thanks for reply Anuradha,

I have found that there are 2 pads in iMX6UL which can be configured as CSI_FIELD which I suppose can be connected to DE of ADV7611 , but I just want to know whether it is necessary to use DE at all?

Can't we capture data just by using only HSYNC and VSYNC as synchronization signal?

Because in the evaluation board the 2 pads of iMX6UL which can be used as CSI_FIELD are already being used with other peripherals.

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tengri
Contributor IV

Dear Sadatan, were you able to get the 16 bit interface to work ???

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sadatanvashisth
Contributor II

Not yet, as we didn't receive our board yet. But just to clarify we are targeting 8-bit interface only.

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tengri
Contributor IV

The reason might be, most generic parallel camera sensors do not have a data enable line. But in your case adv7611 requires DE as it indicates the active region of pixel data, and responsible for timing of sync signals :

http://www.analog.com/media/en/technical-documentation/user-guides/UG-180.pdf  

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sadatanvashisth
Contributor II

Thanks Anuradha.

Do i need these pull down on unused CSI data lines even if I am not configuring them as CSI data lines as I am planning to use D0-D7 lines only connecting them to P8-P15 lines of ADV7611 by configuring CSI_D0 to CSi_D7 as CSI_D2 to CSI-D9 in ALT0 function.

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