Due to i.MX7 layout review check list isn’t released, we provide i.MX6 check list for customer now.
But some layout rules are conflict between i.MX6 and i.MX7.
For example, i.MX6 check list-DRAM bus length check.
It says” the maximum length difference should be less than 25 mils”.
But at i.MX6 Hardware development guide, it shows +/-25mils is acceptable.
So the rule in i.MX6 check list seems to be more strictly.
Our question is we read i.MX7 Hardware development guide.
The rule it shows is +/- 55 mils.
Is it the right value for i.MX7 DDR trace length check?
Or we should follow i.MX6 check list to do this layout of DDR circuit.