Problem on debugging a prototype board with the LPC54102

[antoniojorge]

I have problems on debugging a brand new prototype board, with a LPC54102J512.
I´using the LPCXpresso and  a LPC-LINK2 probe to do it, using the SWD interface.
I have success on put the firmware on the internal flash, but after that the debugger or stop to work, or have a odd behavior.

Using the ISP by serial port 0 and Flash Magic application. Is possible to verify that  the firmware was in the internal flash, and using the Verify command it's totally match with the hex file, get from the firmware used on the debug session.
In fact all the Flash Magic commands work's fine. But all the firmware that  I try download, don't start after the download end.
I may missing some necessary initialization before the first firmware download, since is a new LPC54102J512 part. But I don't find it in de chip manual.

Already done:
- Test the firmware in another board. I have a OM13077(LPCXpresso™ Board for the LPC54100). It works fine.
- Using the OM13077 like a debuger probe. Same behavior that's with LPC-LINK2.
- Reducing the probe speed ( wirespeed on the LPCXpresso debug option), as lower as 10kHz. No changes.
- Replace the board chip by a new one. The problem remains.
- See the SWCLK, SWIO, nRESET and ISP signals on an oscilloscope. It's looks fine. No changes on the ISP signal when the SW usage. And the  nRESET signal only changes on the begin of the debug session.

Can some one help me?

This the LPXpressso debugger messages console:

LPCXpresso RedlinkMulti Driver v8.2 (Sep  5 2016 10:12:38 - crt_emu_cm_redlink build 725)
Probe Firmware: LPC-LINK2 CMSIS-DAP V5.173 (NXP Semiconductors)
Serial Number:  CWGWKYOQ
VID:PID:  1FC9:0090
USB Path: \\?\hid#vid_1fc9&pid_0090&mi_00#8&24b2a689&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
Vector catch on SYSRESETREQ signal
Emu(0): Connected&Reset. DpID: 2BA01477. CpuID: 410FC240. Info: <None>
Debug protocol: SWD. RTCK: Disabled. Vector catch: Enabled.
inspected v.2 On-chip Flash Memory C:\nxp\LPCXpresso_8.2.2_650\lpcxpresso\bin\Flash\LPC5410x_512K.cfx
image 'LPC5410x (512K Flash) Jun 21 2016 11:53:08'
NXP: LPC54102J512  Part ID: 0x00000000
Connected: was_reset=true. was_stopped=true
LPCXpresso Free License - Download limit is 256K
Opening flash driver C:\nxp\LPCXpresso_8.2.2_650\lpcxpresso\bin\Flash\LPC5410x_512K.cfx
Writing 11560 bytes to address 0x00000000 in Flash
Erased/Wrote page  0-0 with 11560 bytes in 523msec
Flash Write Done
Flash Program Summary: 11560 bytes in 0.52 seconds (21.59 KB/sec)
Stopped (Was Reset)  [Reset from Unknown]
Stopped: VectorCatch:Reset (PC unknown: stack=0xFFFFFFE0) (VectorCatch)
Em(12). System rejected access at location 0x36FFEEFE
Em(12). System rejected access at location 0x36FFEEC4
.
.

Em(12). System rejected access at location 0x36FFEEFE
Em(12). System rejected access at location 0x36FFEEC4
Em(12). System rejected access at location 0x36FFEEFE
(crt_emu_cm_redlink) terminating due to request from GDB

This is the LPXpressso RedlinkServer console:

[Connected on port 3025]
redlink>ProbeList
Index = 2
Manufacturer = NXP Semiconductors
Description = LPC-LINK2 CMSIS-DAP V5.173
Serial Number = CWGWKYOQ
VID:PID = 1FC9:0090
Path = \\?\hid#vid_1fc9&pid_0090&mi_00#8&24b2a689&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
redlink>ProbeStatus
Index = 2
Manufacturer = NXP Semiconductors
Description = LPC-LINK2 CMSIS-DAP V5.173
Serial Number = CWGWKYOQ
VID:PID = 1FC9:0090
Path = \\?\hid#vid_1fc9&pid_0090&mi_00#8&24b2a689&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
IsOpen = FALSE
WireInitialized = FALSE
WireProtocol = JTAG
CoresConfigured = FALSE
PacketSize = 1024
Reference Count = 0
HasSWV = FALSE
HasETM = FALSE
HasJTAG = TRUE
HasSWD = TRUE
Probe Type = CMSIS-DAP
Probe Reference Count = 0
redlink>ProbeIsOpen 2
FALSE
redlink>ProbeOpenByIndex 2
Probe Handle 2 Open
redlink>WireIspReset 2
redlink>WireIsConnected 2
FALSE
redlink>WireSwdConnect 2
DpID = 2BA01477
redlink>CoresConfigured 2
FALSE
redlink>CoreConfig 2
Number of CORES/TAPs = 1, Fully recognized: True
redlink>CoreList 2
TAP 0: 2BA01477 Core 0: M4 APID: 24770011
TAP 0: 2BA01477 Core 1: M0 APID: 24770011
redlink>ProbeIsOpen 2
TRUE
redlink>WireIspReset 2
redlink>WireIsConnected 2
FALSE
redlink>WireSwdConnect 2
DpID = 2BA01477
redlink>CoresConfigured 2
TRUE
redlink>ProbeStatus
Index = 2
Manufacturer = NXP Semiconductors
Description = LPC-LINK2 CMSIS-DAP V5.173
Serial Number = CWGWKYOQ
VID:PID = 1FC9:0090
Path = \\?\hid#vid_1fc9&pid_0090&mi_00#8&24b2a689&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
IsOpen = FALSE
WireInitialized = FALSE
WireProtocol = JTAG
CoresConfigured = FALSE
PacketSize = 1024
Reference Count = 0
HasSWV = FALSE
HasETM = FALSE
HasJTAG = TRUE
HasSWD = TRUE
Probe Type = CMSIS-DAP
Probe Reference Count = 0
redlink>quit
[Closed]

[antoniojorge]

First at all, thank you for your reply, "LPCXpresso Support".

I already double check the design, and I think that is like suggested in the "Design Considerations for Debug”.

In fact the debug find the 2 TAP on the chip.

And  the debuger "talk" a lot with the chip. The maximum probe clock was limited to 100kHz.

The signals section of flash erasing and flash write, see be OK.

But after, that the debugger lost the communication with the chip, it retry several times before stop.

But all the firmware was write on the flash, and I can read it by ISP.

IMPORTANT NOTE - After the unsuccessful debug session, is necessary to cycle the board power ( OFF -> ON) to access the chip by ISP.

To avoid side efects from a firmware made by me.

I'm are using the "periph_blinky" example from the  lpcopen (lpc5410x_lpcxpresso_54102_lpcxpresso_3.01a.000_11) on all the tests.

Regards

António Jorge

[markswinburn]

Hi Antonio, were you able to resolve your issue?

I note that your board uses R4 and R5 which should not be required as these pins are internally pulled high by MCU.

From your debugger and Redlink logs it can be seen that the emulator is connecting to the core once the fw has been downloaded to the chip and is reset. This is where your code then starts to initialise and here is where the issue appears, ie cannot communicate with core. Are you able to confirm operation of the DTR_ISP_Reset pin which may be effecting chip initialisation sequence with debugger SWD sequence?

[lpcxpresso_supp]

In the first place, I suggest that you double check the design of your debug/reset circuitry, as per - https://community.nxp.com/message/630601 and what you are doing with the ISP pins in particular.

It would then be worthwhile creating a simple LPC54102  "hello world" project using the "LPC5410x (M4) C Project (semihosting)" new project wizards, and seeing whether you can debug that.

Regards,

LPCXpresso Support