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Serdes Lane/Signal assignment for SGm T2081

Question asked by Christian Kellermann on Jan 17, 2017
Latest reply on Jan 18, 2017 by Serguei Podiatchev

The T2080RM specifies Lane/Signal assignments for PCIem interfaces in table 19-2.

I am unsure how the SGMII interfaces relate to this and also this table is not referenced in the text.


Is there a similar table to get to the assignment for the SGMII interfaces?


And a second related question:


What's the relationship of lanes and slots in the U-Boot code when setting up the interfaces. Especially why assign all SGMII interfaces to slot 7, say, when SerDes is configured in config 0xf2?


I may just be confused about the different naming conventions. Maybe you can say something about this as well. (The naming, not my confusion).