My customer plan to use i.MX7D and LPDDR2 and have two questions about DRAM register setting.
Would you teach me how to decide the value of ZQ_RESISTOR_SHARED register setting ?
Is it depend on the type of DRAM memory ?
The description for WR_ODT_HOLD register is only for DDR3 in reference manual.
Which value should I set to the register when I use LPDDR2 ?
Can I leave it for the default settings?
Or do I need to set the value of tDQSS from the DRAM data sheet ?
If I need to set the value of tDQSS, there are min and max value of it in the DRAM datasheet so please teach me which value is correct.