In the i.MX6Q ref manual, chapter about CCM, there are some numerator / denominator register for several PLL.
In the Audio PLL numerator, for example, we can read:
This register contains the numerator (A) of Video PLL fractional loop divider.(Signed number)
Also, the binary layout of the register forces bits 30 and 31 to be set to 0.
Does this mean that the numerator will alway be positive, between 0 and 2^30 - 1, or does this mean that the numerator is a signed integer of 30 bit, and I should compute the 2 complement on 30 bits (and not 32 bits as usual) ?
Could anyone clarify that please ?
PS: for the record, in linux, the register is read as an uint32_t without any special treatment.