I'm trying to use LPC4370FET256 (BGA) device with HSADC for continuous sampling of 4 analog channels with 1MSamples / per seconds (each). While all things regarding data transfer has been successfully managed, I'm struggling now with power supply (VDDIO:3.3V) noise coupling directly into HSADC samples.
- During DMA transfer of samples form internal SRAM to external SDRAM - 6mV of voltage noise is created on +3.3V VDDIO. See noise in attached TEK scope figure.
- This noise can be directly seen on HSADC samples. (My analog inputs: ADCHS0 and ADCHS_NEG are shorted and noise free). See captured HSADC samples on attached figure.
- I put additional capacitors on VDDIO, and this improved HSADC immunity, which indicate that noise is coupled through power supply. However I was not able to remove problem completely.
My questions are following:
- Does anybody know from which power domain or power pins HSADC is supplied? I can't find any explicit statement in manual or datasheet about it. Any additional information about HSADC internal voltage reference and its power supply?
- Is there any guideline how to route PCB (analog lines, power supply, ) in order to get maximal HSADC performance? All can be found in datasheet is Table 45 ( 12-bit ADC signal interference ) , which I strictly follow, but it looks that this is far to small, especially if you compare with considerations given for ordinary 12-bit ADC chip?
I wish I was wrong, but form my observation, it looks, that HSADC is supplied from digital power supply, and is very prone to digital power supply noise, and this make him practically unusable for some serious applications, as it's almost impossible to protect digital power supply form noise.