I have been working on high accuracy DMX UART timing with devices with LPUARTs. In some circumstances it is necessary to accurately control inter-character spacing (time delays) and the technique allows zero overhead operation by allowing a PIT DMA trigger to control the transmission points in time.
A reference binary can be found at http://www.utasker.com/kinetis/FRDM-KL27Z.html#UART_TIMER as well as some extra details.
Although I would have liked to do the same for all UART types this hasn't been possible (yet) due to the fact that in order to write data to the data register it is necessary to first read from the UART's status register. This fact is stated clearly in some user manuals (eg. to KL26) but not mentioned in others, where the behavior is the same.
Therefore, the unfortunate behavior of these UARTs (as opposed to the LPUARTs) is that the PIT triggered (and timed) transmission results in only one character actually being sent out even though data is transferred to the UART data register multiple times. Based on this result it would be necessary to use interrupt driven operation to approximate the required behavior (with the additional overhead).
However, it IS possible to transmit based on DMA when the UART's Tx own DMA trigger is used (without the inter-characters spaces of course) and so this raises the question as to how this is possible without requiring a read of the status register at each byte??? The internal mechanism must be doing something to get around this when used like that!
The question is therefore whether there could be some technique to actually allow timer based DMA transmission to be realised? Anyone with knowledge of how this could possibly be accomplished?
P.S. A related topic, including some diagrams, is also here: PIT DMA trigger details