imx6ul CSI can't disable csi_mclk

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imx6ul CSI can't disable csi_mclk

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tony-tony
Contributor III

lm98714_data.sensor_clk = devm_clk_get(dev, "csi_mclk");

retval = of_property_read_u32(dev->of_node, "mclk",&lm98714_data.mclk);

retval = clk_set_rate(lm98714_data.sensor_clk, lm98714_data.mclk);

clk_prepare_enable(lm98714_data.sensor_clk);

clk_disable(lm98714_data.sensor_clk);

See the code show above, I find that after I disable the csi_mclk clk, the imx6ul port(CSI_MCLK) still create wave, I don't know how to disable this clk.

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tony-tony
Contributor III

The root cause: imx6ul CSI clk enable/disable reg is CG0 bit of CCM_CCGR3 not CCGR2, the SPEC
has some issue to describe this reg.

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tony-tony
Contributor III

The root cause: imx6ul CSI clk enable/disable reg is CG0 bit of CCM_CCGR3 not CCGR2, the SPEC
has some issue to describe this reg.

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tomfang
Contributor III

Hi Tony,

are there some APIs that can set CCM_CGCR3 register?

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tony-tony
Contributor III

You can refer to clk-mx6ul.c file, and use memtool to check reg .

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jimmychan
NXP TechSupport
NXP TechSupport

please try this:

clk_disable_unprepare(lm98714_data.sensor_clk);
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tony-tony
Contributor III

Hi jimmychan:

 In fact, I have tried to use clk_disable(lm98714_data.sensor_clk); and clk_disable_unprepare(lm98714_data.sensor_clk); and use memtool to check the reg, after call "clk_disable" or "clk_disable_unprepare" ,the CCGR2 "csi_clk_enable" bit will become disable,but the wave still create.

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