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DSR eMMC

Question asked by Christian Sielaff on Jan 9, 2017
Latest reply on Jan 9, 2017 by alexander.yakovlev

Hi all,

 

how we can adjust the driver strength of the I/O's for the eMMC (eSDHC) controller? We are working on a coustomer LS1021A design, with really short traces between eMMC and processor. We could observ overshoot at the CMD line which are out of operation range.

 

We realy appreciate your response.

 

Best regards and thank you in advance,

Christian

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