AnsweredAssumed Answered

TWR-K60F120M PLL Not Lock

Question asked by Henry Nguyen on Jan 5, 2017
Latest reply on Jan 6, 2017 by Henry Nguyen

Hello,

 

we have been able to create and blink light on TWR-K60F120M using internal clock feeding the FLL.

 

Now, we try to configure the OSC external ref clock (50 MHz from board) to feed the PLL and so on.

The code generation went fine and download OK, but it got stuck waiting for PLL locked at line 486 of Cpu.c file.

we use KDS 3.0 and KSDK 1.3.

 

Attached is the snap shot of the clock configuration and the generated clock configuration codes.

 

Our intention is to drive 50 MHz clock from the TWR board to the EXTAL1 input (system oscillator 1) and then use this clock to drive PLL.  PLL output is 120 MHz.  The 50 MHz External clock is divided by 10 prior to feed the PLL, 

 

On TWR board, i have J18 ON to drive power to OSC and J6 off which means the 50 MHz osc clock is enable according to the schematic and the user jumper guide.  

 

Can you please give us any comment on this?

 

Thank you,

Henry

Original Attachment has been moved to: Cpu.c.zip

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