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SAI MCLK as output on imx6ul

Question asked by Pieter Cardoen on Jan 6, 2017
Latest reply on Jan 9, 2017 by igorpadykov



I'm trying to configure the SAI1 MCLK as output (i.MX6UL drives this MCLK signal). However I can't measure anything on this signal. I've configured IOMUXC GPR1 bit 19 (SAI1_MCLK_DIR) to 1 but this isn't helping.


Pad CSI_DATA01 is used for MCLK.


The datasheet describes this about the MCLK selection (register I2Sx_TCR2)


'MCLK Select
Selects the audio Master Clock option used to generate an internally generated bit clock. This field has no
effect when configured for an externally generated bit clock.
NOTE: Depending on the device, some Master Clock options might not be available. See the chipspecific
information for the meaning of each option.
00 Master Clock (MCLK) 1 option selected.
01 Master Clock (MCLK) 1 option selected.
10 Master Clock (MCLK) 2 option selected.
11 Master Clock (MCLK) 3 option selected.'


What are the different options and where are they documented?


Can anyone help me to get this clock out of the device?