UART low power desgin[MKW24D512]

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UART low power desgin[MKW24D512]

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yuhuixuan
Contributor I

I use two mode of this chip in my project. And I want to desgin a low power UART communication the average current < 1mA. But I need a high speed systerm clock to run our code. And enter low power mode when there is no work to do. The UART communicate must work in both two modes.

1.run mode: Use the external reference clock and the PLL. The systerm clock is 48M and the bus clock is 24M.

2.low power mode: The VLPW mode. Use the 4M Hz IRC. The bus clock is 4M.

I need to switch the two modes frequency(probably in one UART communication). When the systerm clock changed. I need to confige the UART Baud. This could make the UART communication date lost.

Is there any way that when I change the mode the UART works fine? I don't need to confige the baud.

Or How I can make the UART clock don't change when I switch the two modes?

Thank you for your help.

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mjbcswitzerland
Specialist V

Hi

Take a look at the following: https://community.nxp.com/message/421247#421247 

This is included in the uTasker project (also essentially supports KM parts, although not main-stream) and achieves fully responsive UART operation without needing to reduce clock speeds at < 1mA or down to a few uA as long as the UART speed is less that about 56kBaud if the LPTMR can be used for system timing. The system dynamically moves between RUN and the lower power state chose without any further control needed.

Regards

Mark

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yuhuixuan
Contributor I

Hi Butcher,

Thank your for your help.

The UART edge can wake up form the VLPS. Then we may receive the data in the RUN mode. After the UART communicate we enter the VLPS again. But the problem is our average work current must smaller than 1mA. Our baud is 1200. When we wake up to run and receive the date (the run time that finish the UART communication may be 1 second) the current is too big for us.

We find that the UART can work in VLPW mode and the current is 650uA. But when we enter the VLPW mode the UART clock is changed. We need to confige the baud. This may be cause the UART date err. How can I switch between run and lower power mode and the UART clock is not change?

As you say "the LPTMR can be used for system timing", is the system timing is the system clock? And the uTasker project, can you send the code to me? Thank you.

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mjbcswitzerland
Specialist V

Hi

Is it possible for you to use VLPR instead of RUN and switch to VLPW when possible to further reduce power? This way all clocks would remain stable so that you don't get Baud-Rate glitches. It would however limit the maximum speed of operation.

Alternatively, have you tried recalculating the Baud setting each time you change the clock speed because this may be possible as long as you do:

- moving from RUN to VLPR 1. set Baud for the slow speed 2. set the slow clock
- moving form VLPR to RUN 1. set Baud for fast speed. 2. set the fast clock
since it should avoid glitches and be so fast that you won't notice anything.

Often SYSTICK is used for the system timing (generating a TICK interrupt). By using the LPTMR as TICK the tick continues running in more low power modes, which can be useful to ave almost full functionality with lower current consumption.

The uTasker project code is available at http://www.uTasker.com

Regards

Mark

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