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i.MX6ULL : Interface 32-bit LPDDR2 memory with processor

Question asked by Sunil Dhaduk on Dec 31, 2016
Latest reply on Jan 2, 2017 by igorpadykov


We want to interface 32-bit LPDDR2 (4Gb) eMCP memory with i.MX6ULL processor.

But i.MX6ULL has only 16-bit memory controller.

Could you please let me know where to terminate unused DQ31-DQ16 data line of LPDDR2 memory and other related control pins (Mask and Data Strobe)?

If we don't connect DQ31-DQ16 data lines of memory than can we still able to use full LPDDR2 memory space (4Gb)?