i.MX6ULL : Boot from USDHC1 port

[sunildhaduk]

Hi,

We want to boot from eMMC memory with 8-bit configuration and BOOTCFG1[15:13] are selected for 8-bit eMMC boot.

In i.MX6ULL datasheet, D0-D4 lines are selected by default for the USDHC1 port after reset.

As per attached snippet, USDHC1 port D0-D3 are selected in Alt-0 mode while D4-D7 are muxed with NAND control lines in Alt-1 mode.

We want to know that if we connect eMMC with i.MX6ULL using 8 data lines then how many data lines will be used for booting after reset through USDHC1 port?

[igorpadykov]

Hi Sunil

data width is defined by boot configuration described in i.MX6ULL Reference Manual 

Table 8-15. USDHC boot eFUSE descriptions

http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6ULLRM.pdf 

Best regards
igor
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