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IMX6 wandboard and sony imx290 image sensor: mipi csi2 driver problem

Question asked by Umit Kayacik on Dec 30, 2016
Latest reply on Apr 5, 2017 by Titus Stalin

Hi friends,


I bought IMX6Q wandboard and avnet ov5640 camera module that works very well in 1920x1080 with 2 lane mipi csi2 interface. Then I started to derive our current sony imx290 image sensor driver from example ov5640 driver. On my imx290 module it doesnt need external clock source like on ov5640 24mhz, internal clock source produce 37.125mhz and ı probed it works well. Also there is not powerdown(pwd) signal , it is already used in ov5640. There is only reset (xclr) pin.


When ı tried to write with I2C it work well, i can write what ever i want to specific address. By the way my data rate 149mbps/lane and with ddr mode i need to capture 298mhz(my case is 4 lane). According to AN5305, it gives me 0x28 and i set like that in "mxc_mipi_csi2.c".


int mipi_csi2_reset(struct mipi_csi2_info *info)


    mipi_csi2_write(info, 0x0, MIPI_CSI2_PHY_SHUTDOWNZ);
    mipi_csi2_write(info, 0x0, MIPI_CSI2_DPHY_RSTZ);
    mipi_csi2_write(info, 0x0, MIPI_CSI2_CSI2_RESETN);


    mipi_csi2_write(info, 0x00000001, MIPI_CSI2_PHY_TST_CTRL0);
    mipi_csi2_write(info, 0x00000000, MIPI_CSI2_PHY_TST_CTRL1);
    mipi_csi2_write(info, 0x00000000, MIPI_CSI2_PHY_TST_CTRL0);
    mipi_csi2_write(info, 0x00000002, MIPI_CSI2_PHY_TST_CTRL0);
    mipi_csi2_write(info, 0x00010044, MIPI_CSI2_PHY_TST_CTRL1);
    mipi_csi2_write(info, 0x00000000, MIPI_CSI2_PHY_TST_CTRL0);
    /*mipi_csi2_write(info, 0x00000014, MIPI_CSI2_PHY_TST_CTRL1);*/
    mipi_csi2_write(info, 0x00000028, MIPI_CSI2_PHY_TST_CTRL1);
    mipi_csi2_write(info, 0x00000002, MIPI_CSI2_PHY_TST_CTRL0);
    mipi_csi2_write(info, 0x00000000, MIPI_CSI2_PHY_TST_CTRL0);


    mipi_csi2_write(info, 0xffffffff, MIPI_CSI2_PHY_SHUTDOWNZ);
    mipi_csi2_write(info, 0xffffffff, MIPI_CSI2_DPHY_RSTZ);
    mipi_csi2_write(info, 0xffffffff, MIPI_CSI2_CSI2_RESETN);




    return 0;


I have several problems:

1) imx6q returns "mipi csi2 can not receive sensor clk!", i tihnk there is a problem with "0x28".

2) where can we change the csi2 lane number? lane number returns every time 1 (2lane) but i need it should be 3

3) because of image sensor clock source is provided internally, does "mclk" effect something in driver any where?

4) my dtsi is like below, it is derived also from wandboard ov5640 settings, how can i ensure that my virtual channel and ipu channel is ok? what does it mean csi_id?


imx290_mipi: imx290_mipi@1a {
compatible = "sony,imx290_mipi";
reg = <0x1a>;
clocks = <&clks 200>;
clock-names = "csi_mclk";
DOVDD-supply = <&reg_1p8v>;
AVDD-supply = <&reg_2p9v>;
DVDD-supply = <&reg_1p2v>;
rst-gpios = <&gpio1 6 1>; /* xclr */
ipu_id = <0>;
csi_id = <0>;
mclk = <37125000>;
mclk_source = <0>;
lanes = <4>;


5) In "Debug steps for customer MIPI sensor" document, there is a check defined like below, does my setting provide this?

  1. hsp_clk > ccm_pixel_clk/0.9 > (mipi_clk_lane frequency /(8bits*2))*Data_lane_number

    if you have any driver for sony cmos image sensor exp in csi2 settings,could you please share ? I hope that this qst helps to everyone in this work, best regards.