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DRAM vs OCRAM for SDMA<->MPCore Data Exchange

Question asked by Rolf Wöhrmann on Dec 27, 2016
Latest reply on Dec 27, 2016 by igorpadykov

In the context of a high performance bidirectional data exchange between Cortex-A9 MPCore and the SDMA via FU Bursts (using custom SDMA scripts connecting to peripherals), there's non-cached memory needed. Is there any advantage of using OCRAM instead of external DRAM?


For ex. when massive concurrent DRAM writes happen from other A9 cores? I know that NIC-301 handles arbitration of DRAM access and gives SDMA already a better QoS than MPCore, but looking at the NIC-301 chapter in the IMX6QD tech ref, figure 45-1 on p 4012 hints at using the OCRAM for "multimedia" purpose. Since I'm not using any PCIe, FAST3 would be exclusively then used for OCRAM and maybe of advantage than going into arbitration on FAST2 for DRAM?


What I am trying to achieve is a quite massive, stable, un-interrupted bidirectional stream of multiple SSIs to/from MPCore using SDMA. So, from a bus perspective, would using OCRAM for non-cached exchange buffers be preferable over DRAM?