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About error processing of SRIO transactions of P5020

Question asked by Chao Xiang on Dec 25, 2016
Latest reply on Dec 25, 2016 by Chao Xiang

Hi all,

 

I'm using P5020 to communicate with FPGA through SRIO port 1.

When I send the NWrite_R request to FPGA (using DMA to the ROW), how can I determine whether the right response with or without error is received?

 

If the FPGA didn't answer the P5020 request properly, I found the P5020 SRIO port will not issue any further request to FPGA. It looks like the port need to be reset. But how to reset the port to normal state?

 

Any suggestion will be appreciated.

 

best regards

 

Xiang Chao

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