Looking into the connectivity examples like the connectivity_test_genfsk_frdmkw41z (for the KW41Z), there are undocumented references to trim data stored in flash memory (for example: in hardware_init.c).
This is read from flash via calls like:
which reads data from locations specified by FREESCALE_PROD_DATA_BASE_ADDR, which is specified in the linker file as:
FREESCALE_PROD_DATA_BASE_ADDR = ((0x0007FFFF) - ( 2 * 1024 ) + 1);
So the questions are:
- Does NXP plan to have a specific location in flash where production trim data (as measured by NXP at the factory) will be written?
- Could NXP provide reference documentation on the trim data structures it uses for its various microcontroller families?
- Could NXP specify a trim area in flash at a much lower address? i.e. for many Kinetis microcontrollers, location 0x410 is already used for the Flash Configuration Field (FCF), so it might be a convenient convention to store trim data from 0x480 - 0x500.
Any improvements in these three areas, particularly uniform answers to questions 1 and 2, would be greatly appreciated.