interrupt problem (MCU :MPC5604B Compiler :diab 5.5.1)

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interrupt problem (MCU :MPC5604B Compiler :diab 5.5.1)

1,103 Views
joyoungdae
Contributor II

Our team need to change compiler so we generate code that fitted diab compiler  using rappid program

 

so we have succeeded compile and we turned on the LED in main routine

 

but when we apply interrupt serviec routine LED doesn't turn on

 

please review our code     

 

thank your for your time

-------------------------------------------------------------------------------------------------------

/* main file */

#include "MPC5604B.h"
#include "initial.h"
#include "pitm.h"

void ModesAndClockInit(void);
void PeriClockGenInit(void);
void InterruptEnable(void);
void InterruptEnable(void);
void InterruptDisable(void);
void WatchDogDisable(void);
void IVPRInitialize(void);
void IntcInit(void);

 

extern uint32_t IntcIsrVectorTable[];


/** ***************************************************************************
  @fn XXX(void)
  @brief
  @param void
  @return void
  @date 
  @author
  @remark
*****************************************************************************
*/
void IntcInit(void)
{  
    INTC.MCR.B.HVEN = 0;                                 /* Single core: initialize for SW vector mode */
    INTC.MCR.B.VTES = 0;                                 /* Single core: Use default vector table 4Byte offsets */
    INTC.IACKR.R = (uint32_t) &IntcIsrVectorTable[0];    /* MPC555x: INTC ISR table base */
    INTC.CPR.B.PRI = 0;             /* Single Core: Lowest INTC's current priority */   
}

/*********************************************************************************************************
 *********************************************************************************************************/
 void ModesAndClockInit(void)
{
    ME.MER.R = 0x0000041D;          /* Enable DRUN, RUN0, SAFE, RESET modes */
                                    /* Initialize PLL before turning it on: */
    /* Use 1 of the next 2 lines depending on crystal frequency: */
    CGM.FMPLL_CR.R = 0x02400100;                /* 8 MHz xtal: Set PLL0 to 64 MHz --> 15.625ns */
    ME.RUN[0].R = 0x001F0074;                   /* RUN0 cfg: 16MHzIRCON,OSC0ON,PLL0ON,syclk=PLL */
    ME.RUNPC[1].R = 0x00000010;                 /* Peri. Cfg. 1 settings: only run in RUN0 mode */
   
 ME.PCTL[ePCTL_FLEXCAN_0].R = 0x01;           /* MPC56xxB/P/S FlexCAN0: select ME.RUNPC[1] */ 
    ME.PCTL[ePCTL_FLEXCAN_1].R = 0x01;           /* MPC56xxB/S FlexCAN1:  select ME.RUNPC[1] */    
    ME.PCTL[ePCTL_ADC].R = 0x01;                 /* MPC56xxB/P/S ADC 0: select ME.RUNPC[1] */   
    ME.PCTL[ePCTL_SIUL].R = 0x01;                /* MPC56xxB/S SIU: select ME.RUNPC[1] */
    ME.PCTL[ePCTL_WKUP].R = 0x01;                /* MPC56xxB/S WKPU:  select ME.RUNPC[1] */
    ME.PCTL[ePCTL_EMIOS0].R = 0x01;              /* MPC56xxB/S EMIOS 0:  select ME.RUNPC[1] */       
    ME.PCTL[ePCTL_PIT].R = 0x01;                 /* PIT, RTI: select ME_RUN_PC[1] */   
   
    /* Mode Transition to enter RUN0 mode: */
    ME.MCTL.R = 0x40005AF0;                     /* Enter RUN0 Mode & Key */
    ME.MCTL.R = 0x4000A50F;                     /* Enter RUN0 Mode & Inverted Key */
    while (ME.GS.B.S_MTRANS == 1)
    {
        ; /* Wait for mode transition to complete */
    }
}

 
 /**********************************************************************************************************
  *********************************************************************************************************/
 void PeriClockGenInit(void)
 {
     /* Use the following code as required for MPC56xxB or MPC56xxS:*/   
     CGM.SC_DC[0].R = 0x80;
     CGM.SC_DC[1].R = 0x80;          /* CAN&DSPI : Enable peri set 2 sysclk divided by 1 */
     CGM.SC_DC[2].R = 0x80;          /* eMIOS&CTUL&ADC: Enable peri set 3 sysclk divided by 8 */
 } 

 /**********************************************************************************************************
  *********************************************************************************************************/
 void InterruptEnable(void)
 {
     asm(" wrteei 1");
 }
 
 /**********************************************************************************************************
  *********************************************************************************************************/
 void InterruptDisable(void)
 {   
     asm(" wrteei 0");
 }
 
 /**********************************************************************************************************
  *********************************************************************************************************/
 void WatchDogDisable(void)
 {
     SWT.SR.R = 0x0000C520;          /* Write keys to clear soft lock bit */
     SWT.SR.R = 0x0000D928;
     SWT.CR.R = 0x8000010A;          /* Clear: watchdog disable (WEN) */
 }

 /**********************************************************************************************************
  *********************************************************************************************************/
 
uint32_t Time_i = 0;
uint32_t Time_j = 0;


void main(void)
{
 InterruptDisable();   
   
 ModesAndClockInit();
 PeriClockGenInit();   
 WatchDogDisable();     
    IVPRInitialize();   
   
    IntcInit();  
    PitInit();
    PitEnable();

 

    // LED1
    SIU.PCR[eP39_CR28_PN].R = 0x0200;
    //LED2
    SIU.PCR[eP20_CR04_PN].R = 0x0200; 
    //LED3
    SIU.PCR[eP18_CR15_PN].R = 0x0200;

    SIU.GPDO[eP20_CR04_PN].B.PDO = 0;

  
   
 InterruptEnable(); 
 
 for (;;)
 {

    Time_i++;
   
    if(Time_i >= 500000)
    { 
     Time_i = 0;
     SIU.GPDO[eP39_CR28_PN].B.PDO ^= 1;       
    }


        if( stTimer[0].tFinish == 1)
        {
            stTimer[0].tFinish = 0;
           
            /* MCU PIN 49, R369 */
             SIU.GPDO[eP20_CR04_PN].B.PDO ^= 1;
        } 

 


       
  #if 0 
   
    Time_j++;
   
    if(Time_j >= 500000)
    {
     Time_j = 0;
     SIU.GPDO[28].B.PDO ^= 1;
    }

  #endif 
 }
}

/* interrupt file(PIT) */

 

/** ===========================================================================
  @file XXX.c
  @date
  @version v1.00
  @author  
  @brief
  @section
  @remark
  @note   
============================================================================= */
#include "MPC5604B.h"


#include "typedefs.h"
/* user header file */
#include "PITM.h"
#include "Initial.h"


volatile struct stTimer_VAR_t   stTimer[2];

/** ***************************************************************************
*   @fn PitInit
*   @brief Period Interrupt Timer
*   @param void
*   @return void
*   @date 2016/11/01
*   @author
*   @remark
***************************************************************************** */
void PitInit(void)
{
    PIT.PITMCR.R = 0x00000001;              /* Enable PIT and configure timers to stop in debug mode */
    PitChSet(PIT1_CH, 1);
    PitChSet(PIT2_CH, 1);
    INTC.PSR[eN60_PIT_CH1].R = 0x01;
    INTC.PSR[eN61_PIT_CH2].R = 0x01;
}

/** ***************************************************************************
  @fn XXX(void)
  @brief
  @param void
  @return void
  @date 2016/11/01
  @author
  @remark
***************************************************************************** */
void PitEnable(void)
{
    STM.CNT.R = 0;   
    PIT.PITMCR.B.MDIS = 1;

    PitChSet(PIT2_CH, 1);
}

/** ***************************************************************************
  @fn XXX(void)
  @brief
  @param void
  @return void
  @date 2016/11/01
  @author
  @remark
***************************************************************************** */
void PitDisable(void)
{
    PIT.PITMCR.B.MDIS = 0;
    PitChSet(PIT1_CH, 0);
    PitChSet(PIT2_CH, 0);
}

/** ***************************************************************************
*   @fn PitChSet
*   @brief Period interrupt timer channel set
*   @param uint16_t IntSet : setmode, uint16_t Ch : channel, uint32_t Period : period timer value
*   @return void
*   @date
*   @author
*   @remark
***************************************************************************** */
static void PitChSet(uint16_t Ch, uint16_t IntSet )
{
    switch(Ch)
    {
        case PIT1_CH :
            PIT.CH[Ch].LDVAL.R = PIT1_PERIOD;
            break;
        case PIT2_CH :
            PIT.CH[Ch].LDVAL.R = PIT2_PERIOD;
            break;
        default :
            break;
    }
    PIT.CH[Ch].TCTRL.B.TIE  = IntSet;
    PIT.CH[Ch].TCTRL.B.TEN  = IntSet;
}

/** ***************************************************************************
  @fn XXX(void)
  @brief
  @param void
  @return void
  @date 
  @author
  @remark
***************************************************************************** */
void Interrupt_PIT1(void)
{
    stTimer[0].tFinish = 1;
   
    PIT.CH[PIT1_CH].TFLG.B.TIF = 1;           /* MPC56xxB/P/S: Clear PIT 1 flag by writing 1 */
}

/** ***************************************************************************
  @fn XXX(void)
  @brief
  @param void
  @return void
  @date
  @author
  @remark
***************************************************************************** */
void Interrupt_PIT2(void)
{
     SIU.GPDO[eP18_CR15_PN].B.PDO ^= 1;

   
    PIT.CH[PIT2_CH].TFLG.B.TIF = 1;           /* MPC56xxB/P/S: Clear PIT 1 flag by writing 1 */
}

 

/* Vector table */

 

PIT interrupt have allocated 60,61 table

 

#include "MPC5604B.h"
#include "pitm.h"

/**********************  Function Prototype here *************************/

void interrupt_handler (void);

/*************************** Pragma_1 Section **************************/

/* pragma for defining the section of the Interrupt Vector table */
#pragma section data_type ".vects" ".uvects"

/* Definition for the Interrupt Vector table */
uint32_t IntcIsrVectorTable[] = {
    (uint32_t)&interrupt_handler,    /* Vector - 0    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 1    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 2    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 3    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 4    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 5    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 6    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 7    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 8    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 9    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 10    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 11    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 12    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 13    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 14    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 15    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 16    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 17    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 18    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 19    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 20    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 21    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 22    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 23    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 24    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 25    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 26    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 27    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 28    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 29    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 30    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 31    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 32    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 33    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 34    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 35    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 36    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 37    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 38    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 39    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 40    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 41    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 42    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 43    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 44    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 45    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 46    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 47    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 48    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 49    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 50    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 51    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 52    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 53    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 54    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 55    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 56    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 57    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 58    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 59    interrupt_handler*/
    (uint32_t)&Interrupt_PIT1,    /* Vector - 60    interrupt_handler*/
    (uint32_t)&Interrupt_PIT2,    /* Vector - 61    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 62    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 63    Reserved */
    (uint32_t)&interrupt_handler,    /* Vector - 64    interrupt_handler*/
    (uint32_t)&interrupt_handler,    /* Vector - 65    interrupt_handler*/

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1 Reply

820 Views
lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi,

could you double-check in debugger that:

- MSR[EE] bit is set

- current priority register INTC_CPR is lowered to 0

- priority select register is > 0

- PIT module is enabled (MDIS in PITMCR)

- timer is enabled and interrupt is enabled (TIE and TEN are set in TCTRL)

If all conditions above are fulfilled, TIF flag in TFLG register should trigger interrupt. So, check if the TIF is set.

Then you can place a breakpoint to IVOR4 handler (base address IVPR + 0x40). If the code reaches the breakpoint (and it should if all conditions above are met) you can step the code to see if PIT ISR is called appropriately.

Regards,

Lukas