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Regarding ODT setting of i.MX6UL

Question asked by Surendra Jadhav on Dec 22, 2016
Latest reply on Dec 26, 2016 by Yuri Muhin


I am doing prelayout simulation for i.MX6UL processor with DDR3L.

However in Ref. manual I can see ODT available for all address and control lines.

Also in Hyperlynx for model selection I am not able to understand for processor why address line can be configured as input. The same is shown in attached figure.

I also could not find the list of ODT's available for data lines in reference manual. However I can see them in Hyperlynx model selector. The same shown in attached image.

Let me know if I am using the correct IBIS model for CPU.