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i.MX6UL power rails for POR(power on reset)

Question asked by Surendra Jadhav on Dec 21, 2016
Latest reply on Dec 21, 2016 by igorpadykov


I am ANDing the Reset logic for i.MX6UL processor through three inputs as 1.PMIC reset, 2.Watchdog reset, 3.undervoltage monitor chip reset. However here PMIC reset output is on different power group thatn than Watchdog and UV chip. But its falls in same power group as processor reset.

The same is shown in attached images. I am going to use open drain AND gate.

As you can see power group of PMIC reset and processor reset is VDD_SNVS_3V3, while power group of watch dog and UV chip is DCDC_3V3.

Let me know if it will work.