I encounter a very strange issue about HDLC.
For the HDLC, in my design, uses external clock,
during debug, find that, if feed the HDLC's rx/rx clock with different frequency clock, HDLC rx channel
will can not receive data any more.
Does it need to do some special setting for HDLC if RX/TX clock is different frequency?
Could you help to give some suggestions?