Reset function for KIT6UL-3000EVM

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Reset function for KIT6UL-3000EVM

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marklu
Contributor II

Hi NXP,

Reference design : KIT6UL-3000EVM (SPF-29105)

The i.MX reset input (POR_B) will be driven by RESET_MCU_B of PMIC PF3000.

Why do we need U501(UM803RS) on page 8 for this design? Could we remove it without any side effect?

And how about is the i.MX reset sequence or requirement (just one RTC clock is needed, right? )

BRs

Mark

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igorpadykov
NXP Employee
NXP Employee

Hi Mark

POR duration requirements (which are provided by UM803RS on schematic) are given

in sect.4.2.1 Power-Up Sequence i.MX6UL Datasheet

http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6ULCEC.pdf

The POR_B input (if used) must be immediately asserted at power-up and
remain asserted until after the last power rail reaches its working voltage.

Also clocks should be stable at time of POR deassertion.

Best regards
igor
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marklu
Contributor II

Hi igor,

Thanks for your quick reply for question 2. Would you answer me first question?

"The i.MX reset input (POR_B) will be driven by RESET_MCU_B of PMIC PF3000.

Why do we need U501(UM803RS) on page 8 for this design? Could we remove it without any side effect?"

BRs

Mark

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igorpadykov
NXP Employee
NXP Employee

>Why do we need U501(UM803RS) on page 8 for this design?

to guarantee that all board power supplies are stable when POR will release.

RESET_MCU_B of PMIC PF3000 guarantee only PMIC PF3000 output voltages, which are input

to i.MX6. Some time is needed to charge for example _CAP voltages and other board capacitors.

>Could we remove it without any side effect?"

yes, if you guarantee that all board power supplies are stable when POR will release.

Best regards
igor

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marklu
Contributor II

Hi igor,

I don't understand what you mean.

For reference design, U501 only can guarantee "DCDC_3V3" to reach threshold voltage and generate reset signal. And DCDC_3V3 is came from PMIC. As you said, RESET_MCU_B guarantee PMIC's output and it include DCDC_3V3 indeed. I can't understand what's different w/ or w/o reset IC (U501). Could you explain it more?

BRs

Mark

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igorpadykov
NXP Employee
NXP Employee

Hi Mark

>U501 only can guarantee "DCDC_3V3" to reach threshold voltage

this is not fully correct. It additionally holds _RESET during 140-560mS.

There are other capacitors which should be charged, so U501

adds additional delay. In custom design you can remove it if

all power supplies, including processor _CAP voltages are stable

at deassertion time RESET_MCU_B of PMIC PF3000.

Best regards
igor

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marklu
Contributor II

Hi igor,

OK, so R511 and C503 are reserved for this requirement. 

Thanks for your reply.

BRs

Mark

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