We are using LS1043A, Query on cfg_rcw_src[6:7] in RCW Source Encoding

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We are using LS1043A, Query on cfg_rcw_src[6:7] in RCW Source Encoding

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logeshs
Contributor II

Could you help me in understanding what they have explained in cfg_rcw_src[6:7]? I could understand that for option 10 it provides upto 28b addressability which corresponds to 4Gb address locations for 16bit NOR and 2Gb address locations for 8bit NOR. 

I don't understand these words, " Shift left by 4 to provide up to 28b addressability OR shift right by appropriate amount
(depends on Port Size selected)" under option 10. could you explain me to understand it?

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alexander_yakov
NXP Employee
NXP Employee

If my understanding is correct, this fied cfg_rcw_src[6:7] is used to pre-configure value of "ADM_SHFT" field in register IFC_CSORn_NOR, see section 23.3.6 of LS1043A Reference Manual. Together with ADM_SHFT_MODE field, which appears to be configured by cfg_rcw_src[5], these two fields are used for left or right address shifting. This functionality is described as "Mode 0" and "Mode 1" in Section 23.4.1.2 of reference manual.


Have a great day,
Alexander

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dusanferbas
Contributor III

Functionality is described, but it is not clear for me how it works for 16 bit access. In the figure 23-7 which bit is the lsb of address? A31? How does it look like for x8 memory? Will the shift be only 4 bits and A27 will be involved?

On the figure 23-12, I think 2nd row should be shifted right 1 bit, which makes the word address (i.e. the 'x' is missing in the bit0). The real confusion comes with figure 23-16, where the AD0 signal should contain the A0 bit of address (as per 23-17), but in the 23-16 at AD0 bit position, the bit 30 is shown.

And now for booting - I have an option for 4 bit shift only in the cfg_rcw_src[6:7].Will this work or I am unable to boot in ADM MODE 1 from 16 bit parallel flash?

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alexander_yakov
NXP Employee
NXP Employee

From the LS1043A side, each address value always addresses one byte regardless of port size, so address value output to address lines is not changed depending on port size. The only least significant bit becomes not used for connection. For 8 bit mode all address lines are used, for 16 bit mode each address addresses 2 bytes, so least significant address line becomes unused.

Please, if possible, do not reopen old community topics created by other authors, please create a new topic and add a reference to another topic, when necessary.

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